An N-channel JFET has a low bias current when its gate is biased negative to the source. However, this requires either that the gate voltage be biased negative with respect to the source voltage or ...

The circuit presented by Cor Van Rij for characterizing JFETs is a clever solution. Noteworthy is the use of a five-pin test socket wired to accommodate all of the possible JFET pinout arrangements.

Commercial curve tracers have existed for decades. But designers without access to one can create a simple circuit that uses a function generator and oscilloscope to generate JFET transfer and ...