EDN

Flip-Flop Using CMOS NAND Gates

Using just two NAND or inverter gates its possible to build a D type (or ‘toggle’) flip-flop with a push-button input. At power-up the output of gate N2 is at a logical ‘1’, ensuring that transistor T2 ...
Electronic Design

Layout-Dependent Modeling Boosts CMOS Gate Density

A layout-dependent circuit-design model from Toshiba helps boost gate density and improve cost-performance in next-generation 45-nm CMOS technology. More specifically, 45-nm CMOS gate density can be 2 ...
Nanowerk

CMOS Technology Explained

Complementary Metal-Oxide-Semiconductor (CMOS) technology is a vital part of modern electronics, used in designing and manufacturing integrated circuits (ICs) that power many digital devices. CMOS ...
Electronic Design

Six MOSFETs, Four Pins Create Two-Input Combo NAND/NOR Gate

This CMOS two-input combination NAND/NOR gate is a three-input, fourpin logic gate. A p-channel enhancementtype MOSFET (Q1) and an n-channel enhancement-type MOSFET (Q4) form one complementary ...
Design-Reuse

Low Power Universal Gates for Approximate Computing

Density and speed of IC’s have increased exponentially for several decades, following a trend described by Moore’s Law. While it is accepted that this exponential improvement trend will end, it is ...
Design-Reuse

Tech Tour of Metal Gate I/O Transistors

No one talks about the workhorse of the metal gate CMOS transistors -- the input/output (I/O) transistor. TechInsights thinks they are worth a look. Much has been written about metal gate CMOS ...